I assume you mean bussed networks.  In that case I use a symbol of a resistor with only one pin.  The common pin is an invisible "power pin".  I create an attribute that shows on the circuit to name the net.  (in the lib the value is "rename-me" so you won't forget)
Need more?  I can extract the part and email it to you.
George Uptain

-----Original Message-----
From: Mary Sugden [mailto:[log in to unmask]]
Sent: Thursday, February 25, 1999 5:49 PM
To: [log in to unmask]
Subject: [DC] PowerLogic and Resistor Packs??


I Have run into a problem in creating meaningful symbols for resistor packs in
PowerLogic.  Showing all resistors together as one symbol is not a problem.
However, ther are many instances where individual resitors within a pack are
scattered all over the schematic and a single symbol is not practical.  I have
tried everything that I can think of to draw and package these items so that I
do not get error reports on the netlist or problems when impoting the netlist
into PCB.  I also need an intelligent database in order to run circuit
simulation routines.  Does anyone have an answer or workaround for me.

Thank,
Helpless in Silicon Valley
Melinda@TeachPCB

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