Patranit
I THINK you are asking about using a real circuit rather than a test coupon,
but correct me if I am wrong.
In order to conduct SIR tests, it is necessary to utilise an interdigitated
comb pattern. This could be done on a redundant area of an assembly, such as
under an IC, QFP etc.. but you must ensure that it is guard banded ie. that
there will be no interference in the test reading measured.
Usually, a test coupon would be used. Examples include IPC B24, B25, B36 but
you could develop your own, although there are some major design issues that
should be addressed.
I personally consider that the coupon should be manufactured by your PC
Board supplier so that it is truly representative of your end product.
In the second part of your question, it seems that you ask whether
components should be overmounted to the comb pattern. If you are
testing/characterising flux according to J-STD004, no you do not have to
overmount. In my opinion you should - but my opinions are just that.
It is also my recommendation that the test coupon should be processed fully
in the same way as the end product if you are characterising your process,
viz.
J-STD 001 Appendix D.
Can you use the test this way? Yes. Do you have to? No. Should you? In my
opinion yes.
Some other observations: The present test method specifies one test
measurement per 24 hours. Research shows that dendrites may form and
collapse within 20 minutes. I recommend that you measure at 20 minute
intervals.
The present test proposes 50v bias. But 50v MAY destroy such dendrites and
not be representative of your actual assembly. I recommend that you use a
voltage gradient say 100v/mm. There are test instruments that will do all
this and much more - but that would be a commercial - ask me and I will send
offline.
Test conditions: Depends upon which product class you are building - 1, 2 or
3. Then test accordingly.
Remember, the supplier of a process material (resist, flux, paste, coating
etc.) is only testing his product on a coupon that is squeaky clean. Is that
representative of your end product? No. Hence test as per your own process
with the same process materials in place - oh, and check that the dummy
components are just that. Specify these as SIR dummies.
I hope this answers your questions.
Regards, Graham Naisbitt
[log in to unmask]
Concoat Ltd Phone: +44 1276 691100
Alasan House Fax: +44 1276 691227
Albany Park
CAMBERLEY
GU15 2PL UK
-----Original Message-----
From: Patranit Waitayasuwan <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: 22 March 1999 03:34
Subject: [TN] SIR test
> Refer to ANSI/J-STD-004 in detail of IPC-TM-650 Test Method No.
>2.6.3.3 Surface insulation Resistance,Fluxes. I would like to ask
>you the following question:
>
>1. Is this procedure can use for PCBA( Use actual PCBA after assy
>as the sample board) because I understand that Test Method No.
>2.6.3.3 use for identify effect of flux by SIR test and we
>must prepare the specimen by flux which we want to test, But we
>would like to test our PCBA(finish good) Can use this procedure
>or not? Or have other specific method for SIR test of residue
on
>PCBA?Or use test coupon to simulate by pass thru our process?
>
>2. We can use the following item for test all type& dimension of
>sample which used to confirm our process ? :
> - test condition(humidity,temperature-------------->85 C,85%RH
> - test pattern size
> - other parameter
>
>Please answer my question and thank you for your response.
>
>Patranit.
>
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