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February 1999

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Subject:
From:
"Shaddock, David M (CRD)" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 15 Feb 1999 08:52:34 -0500
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Jason,
Here is one references to get you started:
"How Much Rework is Too Much?: The Effects of Solder Joint Rework on Plated-through Holes in
Multilayer Printed Wiring Boards", Garrison, Lee, Park Todd; Soldering & Surface Mount Technology,
No.19 Feb. 95.
Dave Shaddock

> ----------
> From:         Jason P. Bragg[SMTP:[log in to unmask]]
> Reply To:     TechNet E-Mail Forum.;[log in to unmask]
> Sent:         Friday, February 12, 1999 2:25 PM
> To:   [log in to unmask]
>
> Has anyone done a study on the correlation of board reliability vs. the number
> of heat cycles a board sees?  Particularly, if a board has been through 2 smt
> processes and wavesolder, how much smt rework can one do to the board and still
> feel confident that the product won't fail in the field?  I'm especially
> interested in large boards, .100" thick, 18 layer, OSP finish.
>
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