TECHNET Archives

February 1999

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Wade Oberle <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 4 Feb 1999 14:10:33 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (179 lines)
Steve,
        I think you hit it on the head with the chip networks and
capacitor arrays.  Six months ago I hadn't seen these things and now 40%
of our new BOMs have them.  If a BOM has one it usually has 20.  They
are a big boost to productivity and reduced cost.

Wade

        -----Original Message-----
        From:   Stephen R. Gregory [SMTP:[log in to unmask]]
        Sent:   Thursday, February 04, 1999 1:50 PM
        To:     [log in to unmask]
        Subject:        Re: [TN] Component Land to Land Spacing

        n a message dated 2/4/99 8:12:20 AM Pacific Standard Time,
        [log in to unmask] writes:

        << david asked......

         IPC-SM-782 Figure 3-8 specifies that the minimum land to land
spacing
         between two different SMD IC type components is 0.050"(1.25mm).
Section
         3.6.1.4 seems to indicate that the spacing between any two
component lands
         could be as small as 0.020" (0.05mm).  I would like to use the
smaller of
         the two since my board is very crowded.  What do you believe
the real
         clearance is?

         David E. Dalke
         Masimo Corporation
         Irvine, CA
         ............................

         david,
         you will get some excellant advice from a number of well
meaning, experienced
         engineers on this.  However, please go ask the poor engineer
(in-house or
         sub-contract) who builds your hardware.  His equipment may not
be of the
         latest vintage, or his management may not believe in the
highest levels of PM
         or pay the cost of the latest stencil tecnology.  As a result,
you need to
         know what your factory can do, not what my factory can do.  Now
if you find
         that your factory is limiting what you can design, and you find
that others
         can do better, please feel free to load your cannon with that
info.

         steve mikell
         lead ind. eng.
         sci systems
         technology group
         plant 13 >>
        .....................................

        Hi David,

             Steve gives some pretty good advice, but most machines
nowadays use some
        sort of vision correction system that will allow you to place
components like
        a brick wall if you wanted to, that goes without saying that
there's gotta be
        recognizable fiducials on the board, and that there's a CAD file
to generate
        the pick and place program with.

             The sections in the '782 are pretty right on when I read
them. Paragraph
        3.6.1.1 has the best statement in there that reads; "..the
designer should not
        lose sight of manufacturability, testability, and repairabilty
of SMT
        assemblies." The .050" distance that's shown in figure 3-8 is
also clarified
        in the same paragraph with the statement; "Based on experience,
the figures
        shown in 3-8 meet manufacturability requirements." The key word
is
        manufacturabilty...it doesn't go on to say anything else about
repairabilty,
        or testability. So the way I read that you can be comfortable
that if you lay
        out a board that has components spaced .050" apart, it can
probably be
        asembled by most. However, I wouldn't say the same about rework,
or even
        inspecting PLCC's if they were spaced .050" apart like is shown
as the minimum
        spacing. Figure 8 also has that little detail drawing at the
bottom that
        illustrates that very point.

             Section 3.6.1.4 basically is talking about grid based
placements the way
        I read it. PTH grid based designs have been normally done on a
.100" grid.
        What I read they're saying is that with the advent of high
density SMT designs
        (components like 0402's or even 0201's!), it is possible, and
acceptable to go
        down to .025" land spacing, and how grid based placements are
now being based
        on a .5mm with a subdivision of .05mm to get away all the random
placements
        that the .100" grid gives you when incorporating PTH and SMT
within the same
        board. So yes, you CAN go to .025" spacing but you still gotta
think about
        what you're putting that close together, and if that's something
that you want
        to risk. Resistors and capacitors? Sure, I would say no problem
(if it's going
        to reflowed, not waved) But I sure would hesitate putting
J-leaded parts that
        close. Not that it's not ever been done, because I've had to
build SIMM's just
        like that before, there was no choice, the parts HAD to be that
close, but let
        me tell you it was truely a nightmare to rework. We couldn't
really inspect
        the solder joints except for the ones on the outside periphery,
just had to
        test it and if it failed it was like a scavenger hunt trying to
find out what
        was wrong (this was a "T" shaped 256MB SIMM)...it was double
sided too.

             You say your board is pretty crowded, have you done
everything that you
        can to save some space? The only reason I ask that is because I
see a lot of
        boards that are really packed, and a lot of the time much of the
space is
        taken up by individual resistors and capacitors, and I'm
suprized that I don't
        see more chip networks and capacitor arrays in use than I do. To
me, that
        seems like it would be a tremendous amount of space savings,
they're the size
        of a 1206 and you put 4-resistors down with each placement
cycle. You not only
        save space, but increase throughput too.

        -Steve Gregory-

        ################################################################
        TechNet E-Mail Forum provided as a free service by IPC using
LISTSERV 1.8c
        ################################################################
        To subscribe/unsubscribe, send a message to [log in to unmask]
with following text in the body:
        To subscribe:   SUBSCRIBE TechNet <your full name>
        To unsubscribe:   SIGNOFF TechNet
        ################################################################
        Please visit IPC's web site (http://www.ipc.org) "On-Line
Services" section for additional information.
        For technical support contact Hugo Scaramuzza at [log in to unmask]
or 847-509-9700 ext.312
        ################################################################

################################################################
TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
################################################################
To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body:
To subscribe:   SUBSCRIBE TechNet <your full name>
To unsubscribe:   SIGNOFF TechNet 
################################################################
Please visit IPC's web site (http://www.ipc.org) "On-Line Services" section for additional information.
For technical support contact Hugo Scaramuzza at [log in to unmask] or 847-509-9700 ext.312
################################################################


ATOM RSS1 RSS2