We are asked to carry out a high current layout design. The PCB layer is
expected to be at least 10-12 layer with 2oz copper per layer. The layer
count could be less . The PCB consists of some terminating blocks that
can handle as high as 150Amp with some HDC connectors whose pin is
expected to carry at least 7.5Amp per connector pin.

We intend to route each connector pin out and joined them using area
fill. However, the engineer is questionable whether the large area  fill
can support 30Amp? I would appreciate some help in this design on the
followings or others :

How wide should the trace width be?
How many layer is consider sufficient if 2oz copper is used per layer?
How do one calculate the current carrying capacity of the trace,
especially in this design?

Thanking in advacne to all who response to my queries.

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