Warren-

"Lines between pins" probably refers to the number of circuit traces
between PWB vias. For a given via-to-via spacing (the via, or pin
"pitch"), 125/125 most likely means 125 micron lines (traces), with 125
micron spaces between evenly spaced traces, which in English units
corresponds to 5 mil lines/5 mil spaces (1 mil is approx. equal to 25
microns).

For DIP style IC pins (into plated thru hole "vias"), pins 100 mils
(0.100 inches) apart, with a 45 mil dia pad at each pin, can have 5
traces running between the pads, where all traces and clearances are 5
mils nominal.

-Michael Alderete, Aerojet


You wrote...
------------------------------

Date:    Tue, 1 Dec 1998 00:53:59 -0500
From:    "Dr. Warren Smith" <[log in to unmask]>
Subject: Lines Between Pins

In a journal article I am translating (from Japanese into English)
regarding
PWBs, there are many statements about "lines between pins." Low-end
boards
have 2 lines between pins.  Normal boards have 3 lines between pins.
High
end boards have 4 lines between pins (at 125/125 lines and spaces). The
highest density production boards, apparently, have 5 lines between
pins.

What is all of this talking about? Lines of *what*?

Is this referring to a ratio of pin-to-pin spacing vs. line spacing on
the
board?

Any help you can give me would be appreciated.

Thanks in advance.

Warren Smith, Friendly Neighborhood Japanese Technical Translator

------------------------------

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