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December 1998

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Subject:
From:
"Hiteshew, Michael" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 8 Dec 1998 12:59:47 -0500
Content-Type:
text/plain
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text/plain (68 lines)
Vinit,
        We follow IPC-D-275 guidlines for leaded parts ( minimum hole = .010
in. or .0004 mm over nominal lead, maximum hole = .028 in. or .0011 mm over
nominal lead)
regardless of lead size or power dissipation.
        If you're worried about heat dissipation on the power diode, you
need to deal
with that separately. Also, be sure to follow the guidelines for minimum
bend radius
on the lead.

 Michael Hiteshew
 Lockheed Martin Launching Systems
 [log in to unmask]
 (410) 682-1259

> ----------
> From:         Vinit Verma[SMTP:[log in to unmask]]
> Reply To:     TechNet E-Mail Forum.;Vinit Verma
> Sent:         Tuesday, December 08, 1998 6:43 AM
> To:   [log in to unmask]
> Subject:      [TN] Lead dia to Hole Dia ratio
>
> Hi Technetters,
>
> Anybody using power diodes in a mixed tech. (SMT + Leaded) PCB, single
> sided, FR2 material?
>
> What is the Lead Dia to Hole dia ratio normally used by all of you in case
> of POwer diodes? Otherwise also what ratio is most oftenly used?
>
> Thanks in advance
>
> Regards
> Vinit Verma
> Ph: 0124 372721,2,3(O)  Fax: 0124 372724 (O)
>     011 7871747 (R)          011 5783571 (R)
>
> --------------------------------------------------------------
> Bharti Telecom Limited, Gurgaon, India
>
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