DESIGNERCOUNCIL Archives

December 1998

DesignerCouncil@IPC.ORG

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DesignerCouncil <[log in to unmask]>
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"John D. Morin" <[log in to unmask]>
Date:
Wed, 9 Dec 1998 07:41:04 -0700
Reply-To:
"DesignerCouncil E-Mail Forum." <[log in to unmask]>, David Baldwin <[log in to unmask]>
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From:
David Baldwin <[log in to unmask]>
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John:

Basically, it allows 8 mil trace and 8 mil space, allowing one trace
between .050" pitch smt I.C.s, and two traces between 0.100" pitch
thru-hole devices using 0.060" lands.  This was pretty much the standard
when SMT was first becomming popular and there was conventional thru-hole
mixed with SOIC's.  It applies most importantly with autorouters that use
fixed grids, such as the old PADS rip-up and re-try autorouter.

Dave.
___________________________________
    PCB Designs By Baldwin Tech.
(602) 539-4400  FAX (602) 539-4500
   http://www.baldwin-tech.com
___________________________________

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