Hi Gaby,
Typically most of the manufacturer's (AVX, Murata, TDK, and Kemet to name
a few) have application notes and may be available on their websites.
 Going back about 4 years ago, my evaluations (at a former employer) of
multilayer ceramic chip capacitors being wave soldered yielded the
following:
 - orientation of the chip parallel with the wave (end terminations
simultaneously contact the wave)
 - delta temperature from preheat to wave should be <120 C (the lower the
better but look at most vulnerable component for temperature limits at
preheat)
 - 0805 {1206, 0805, 0603 were tested} cracked less than any other size
(after thermal cycling -- -40 to +100 C / most mfr's suggest not using
larger than 1206 but I would start with 0805 as long the values you need
are available in that size and of course if your CCA real estate supports
the use of this size)
 - glue dot (prefer double dot as long as you can prevent moisture traps
for flux residue and other nasties) size and shape requires attention
 - during touch-up/rework and repair operations do not allow the iron to
contact the end terminations
 - handling procedures should also dictate caution
 - lead finish was solder coating or fused SnPb.

Hope this helps.

Steve Sauer
Sr. Mfg. Engineer
Xetron Corporation

 ----------
From:  Gabriela Bogdan[SMTP:[log in to unmask]]
Sent:  Tuesday, October 06, 1998 1:44 PM
To:  [log in to unmask]
Subject:  [TN] Help on design rules for chip capacitors

Hello, TechNetters!
I am looking for information concerning design rules for ceramic chip
capacitors on the
wave soldering side of printed circuits.
I am interested in rules concerning the size, the termination finish and
general manufacturing technology.
If you can help me by giving any information, web sites or recommend
articles , I'll be
very grateful.
Thank you,
Gaby
ok

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