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October 1998

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Subject:
From:
Nüchter Wolfgang (FV/FLT) * <[log in to unmask]>
Reply To:
TechNet E-Mail Forum. <[log in to unmask]>
Date:
Tue, 6 Oct 1998 16:40:58 +0200
Content-Type:
text/plain
Parts/Attachments:
text/plain (166 lines)
Scott,
have you any expirience with lifetime behaviour of your teardrop pads?
Or temperature cycling, ...
Does anyone uses other strange pad-shapes and has experience with new
failure modes?

Wolfgang Nuechter
Corporate Research
Robert Bosch GmbH
Germany


> ----------
> Von:  Lee, Scott[SMTP:[log in to unmask]]
> Antwort an:   TechNet E-Mail Forum.;Lee, Scott
> Gesendet:     Montag, 5. Oktober 1998 21:31
> An:   [log in to unmask]
> Betreff:      Re: [TN] Via's under BGA's
>
> Romeo,
>
> Be very careful of aspect ratios if you go this way, the use of a
> microvia will generally limit the layer count due to this factor.  Which
> in turn, will limit the available surface area for escape routes.  In a
> lower I/O count BGA, the impact may be lessened.  If not, to overcome
> this, you may need to go to blind segments, this tradeoff is not one
> that I would accept.
>
> We have had much success keeping it simple and utilizing teardropped
> lands to the via.  In this approach,  the routing limitations are
> therefore only felt on the primary layer.  In general practice, we have
> found that the more exotic the solution, the lower the yield rates.
>
> Scott E. Lee
> Manufacturing Engineer
> Mercury Computer Systems
>
> > -----Original Message-----
> > From: Kubes, Romeo (NM75) [SMTP:[log in to unmask]]
> > Sent: Monday, October 05, 1998 3:03 PM
> > To:   [log in to unmask]
> > Subject:      Re: [TN] Via's under BGA's
> >
> > Chad,
> >
> > Is using blind Microvias acceptable, since their cavity is so small it
> > would
> > rob a very small % of the solder? (I know this is expensive, but
> > besides
> > this factor).
> >
> > R. Kubes
> > Honeywell DAS Albq
> >
> > > ----------
> > > From:         Thibodeau, Chad[SMTP:[log in to unmask]]
> > > Sent:         Monday, October 05, 1998 11:41 AM
> > > To:   [log in to unmask]
> > > Subject:      Re: [TN] Via's under BGA's
> > >
> > > Bridget,
> > >
> > > There was an excellent paper written by Paul Mescher of Amkor Anam
> > > addressign "...Surface Mount Assembly of Amkor/Anam BGA Packages".
> > In
> > > this
> > > paper Paul describes the importance of PTH isolation (via isolation)
> > and
> > > to
> > > paraphrase him: "No matter what shape or definition technique is
> > used for
> > > the mounting pad, the isolation of the PTH from the mounting pad is
> > an
> > > important feature.  If the PTH is contained within the mounting pad,
> > > solder
> > > can and will wick down the PTH.  The amount of solder that wicks
> > depends
> > > on
> > > many factors, including PTH finish and coating variations.  Because
> > of
> > > this,
> > > the results are somewhat unpredictable.  Some solder joints may be
> > > unaffected, while others will be starved to the point of creating
> > opens.
> > > The worst result is a partially starved joint with severely reduced
> > cross
> > > section.  This joint can have significantly lower fatigue life and
> > result
> > > in
> > > early system failure.  Because the quality of the solder joint is
> > > guaranteed
> > > by control, rather than inspection, designs/processes that result in
> > > random
> > > distributions are generally considered unacceptable, and the
> > PTH-in-pad
> > > design is not recommended."
> > >
> > > If you require additional information you may want to talk with Paul
> > > himself.  I do not have his number, but he is located in Chandler,
> > AZ.
> > >
> > > Chad Thibodeau
> > > EF Data
> > > Component Engineer
> > > 602 333-2138 Phone
> > > 602 921-9012 Fax
> > > [log in to unmask]
> > >
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