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October 1998

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Subject:
From:
Paul Klasek <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 7 Oct 1998 08:15:51 +1000
Content-Type:
text/plain
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Hi Phil

You're right ; sounds that much more clear than J ;
looks like I didn't reed it all after all ( or forgot what I've read ) =
sorry Sherman ; at least I've made a fool of myself with a good result
thanks to Phil .

So that's the law ; can see the tensions on bridging of space working ;
can't see the stress (apart from thermal dissipation = must be the
reason for stacking ban) on stacking .

Thanks Phil ; going shopping (275)

Paul Klasek
http://www.resmed.com

> ----------
> From:         Crepeau, Phil[SMTP:[log in to unmask]]
> Reply To:     TechNet E-Mail Forum.;Crepeau, Phil
> Sent:         Wednesday, October 07, 1998 12:31 AM
> To:   [log in to unmask]
> Subject:      Re: [TN] ASSY: stacking 1206 chip resistors
>
> hi,
>
> well, the nice thing about ansi/ipc-d-275 is that they don't pussyfoot
> around this issue.  they must have actually had manufacturing in mind
> when
> they wrote the following paragraph and inserted figure 4-38.
>
> '4.4.2.1 end-capped discrete components.  end-capped discrete resistor
> and
> capacitor components, and similar leadless end-capped discrete
> components,
> shall not be stacked, nor shall they bridge spacing between other
> parts or
> components, such as terminals or other mounted compnents (see figure
> 4-38).
>
> 'end-cap discrete leadless components with electrical elements
> deposited on
> an external surface, such as chip resistors, shall be mounted with the
> deposited surface facing away from the printed board (see figure
> 4-39).'
>
> don't need a lawyer here do you?
>
> phil crepeau
>
> -----Original Message-----
> From: Paul Klasek [mailto:[log in to unmask]]
>
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