For years, ECL and RAM devices have been produced in mirrored patterns.  The
issues you need to be aware of include land patterns for the device being
considered, proper trace length to shared vias and thermal profiling of the
oven(s) you will be processing through.  It is typically no longer a major
consideration for shadowing of components unless you are planning to use and
IR reflow system.  For high density packaging such as SIMMs, it's best to
use convection ovens with controled zones.  It's been my experience that
keeping each side of the board within profile during each heat cycle, having
good land patterns and avoiding IR - you can mirror patterns and pack in
parts all day long.  Regards (and good luck) Russ, a.k.a. Agent86MI at
Controls/inc. (an EMS)

-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of TOSTEVIN_BC
Sent: Tuesday, October 20, 1998 4:42 PM
To: [log in to unmask]
Subject: [TN] Double sided BGA assembly


     The questions I have are related to back-to-back BGA assembly on
     double sided surface mount designs.  A common application is reverse-
     pinned memory devices, i.e. which lets both parts share similar
     signals (data line, address line, etc.).  Specifically,

     1.   Are the BGA's commonly mounted with their pads exactly mirror
     imaged?

     2.   Can they share common vias?

     3.   Are there any known reliability issues with implementing directly
     mirrored pad configurations?

     Bruce Tostevin
     Benchmark Electronics
     Hudson, New Hampshire

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