Doug,

I have not heard the term ICT for bare board test and I've been an  ATE vendor to the PCB industry for over two decades. Some of the PCB suppliers are supplying buried planar resistors in their multilayer product. The most common format in the US is the Ohmega Ply technology... Anyway, the final test of this type of product requires an accurate measurement of the resistor, along with the normal continuity and leakage tests. Due to the nature of the planar resistors, there are wattage issues that have to be considered.... above and beyond the normal thresholds for the standard leakage/continuity testers.

There is a test methodology for checking the long term reliability of micro vias called latent defect analysis. This test was developed by IBM as a vehicle for testing micro vias (& now for traces less than 3 mils).  The test uses a DC source to heat the via by way of resistance and an AC signal to measure the harmonics..... Typically the test platform is a flying probe and each micro via
is checked. The end result is a non-destructive test of the micro via (or micro trace). Poor plating, barrel cracking, partial voids are consistently found with this type of test. It is expensive.......and very time consuming. 

Jim
>>> Doug Jeffery <[log in to unmask]> 10/14 6:01 AM >>>
Technet,

Has anyone heard of "ICT for bareboards and what does it stand for?

Recently this testing techneque was laid on one of my sales reps.  I
thought they were referring to ICT or in circuit testing done at the
assembly level. He insists that they were referring to bare board
testing beyond opens and shorts.

Does anyone know of this testing and where I can find information about
it?

..

Douglas C. Jeffery
Pre-Production Engineering Manager
Electrotek, Inc.
PH: 414-762-1390
Fax: 414-762-1510
Email: [log in to unmask] 

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