There is also a company in Albuquerque, NM called Conductor Analysis Technologies, Inc.  They do a
statistical analysis of your PBC fab process by non-destructive resistive measurements of coupons with
traces/vias.  Don't think they call it ICT but if you want to tweak your PWB fab line, they claim to be
able to help.

Contact them at [log in to unmask]

Gary P.

Bev Christian wrote:

> Doug,
> It is an electrical power cycling test invented by someone at Nortel, if I
> am not mistaken, sometime in the 80's.  The technology was sold off to a
> little stand-alone company in Ottawa, Ontario.  Where it went after that, I
> do not know.  I know that Via Systems Canada (the old Circo Craft) have a
> set up.
>
> Essentially a thermal stress is applied by resistance heating an array of
> PTH's.  Coupons are cycled until failure occurs.   These results have been
> correlated with the pass/fail criteria of the thermal shock test in
> MIL-P-55110C.  You can get results in about 20 hours, rather than 1000's of
> cycles that take some large fraction of an hour each.  That's all I know.
>
> Good luck,
> Bev Christian
> Nortel
>
> > ----------
> > From:         Doug Jeffery[SMTP:[log in to unmask]]
> > Sent:         Wednesday, October 14, 1998 9:01 AM
> > To:   [log in to unmask]
> > Subject:      [TN] ICT for bare boards
> >
> > Technet,
> >
> > Has anyone heard of "ICT for bareboards and what does it stand for?
> >
> > Recently this testing techneque was laid on one of my sales reps.  I
> > thought they were referring to ICT or in circuit testing done at the
> > assembly level. He insists that they were referring to bare board
> > testing beyond opens and shorts.
> >
> > Does anyone know of this testing and where I can find information about
> > it?
> >
> > .
> >
> > Douglas C. Jeffery
> > Pre-Production Engineering Manager
> > Electrotek, Inc.
> > PH: 414-762-1390
> > Fax: 414-762-1510
> > Email: [log in to unmask]
> >
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