Doug,

My guess would be that IST, Interconnect Stress Test, is being
referred to.  Any experts on IST out there ?

Karl Sauter
Staff Engineer
Sun Microsystems
(408) 276-5499


> Approved-By: [log in to unmask]
> MIME-Version: 1.0
> Date: Wed, 14 Oct 1998 08:01:37 -0500
> From: Doug Jeffery <[log in to unmask]>
> Subject: [TN] ICT for bare boards
> To: [log in to unmask]
>
> Technet,
>
> Has anyone heard of "ICT for bareboards and what does it stand for?
>
> Recently this testing techneque was laid on one of my sales reps.  I
> thought they were referring to ICT or in circuit testing done at the
> assembly level. He insists that they were referring to bare board
> testing beyond opens and shorts.
>
> Does anyone know of this testing and where I can find information about
> it?
>
> .
>
> Douglas C. Jeffery
> Pre-Production Engineering Manager
> Electrotek, Inc.
> PH: 414-762-1390
> Fax: 414-762-1510
> Email: [log in to unmask]
>
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