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September 1998

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Subject:
From:
"Collins, Graham" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 9 Sep 1998 12:54:39 -0300
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Michael
Are you talking process defects only, or including test failures that could
not be caught downstream?  I'll assume you are considering process defects
only.
I believe that you have to consider the device types on the board in any
target - as a crude example, a board covered with 1206 resistors is easier
than 0603's, and a BGA will give you a better process yield (typically) than
a big QFP module.  And the other twist is the inspection criteria - an
amazing yield at class 1 is not so hot at class 3.

If it were me I would base my cut-off on a decreasing target that is
realistically based on past history, expectations, board complexity, design
issues, and rational thought.  At another employer I was on the other side
of this fence, with a customer who had a target and didn't care how well
thought out it was, it was THE target and that was it.

good luck!
 - Graham Collins

-----Original Message-----
From: Michael Forrester [mailto:[log in to unmask]]
Sent: Tuesday, September 08, 1998 5:15 PM
To: [log in to unmask]
Subject: [TN] Acceptable PPM Defect Rate


I am a floor shop engineer for a Digital Oscilloscope line.  Our PCA's have
mixed technology and down to 20 mil. (typically 25 mil and above).
Typically the boards are 12" X 12" with approx. 10K chances for error (ie.
Comp. Count + Lead Count).  Typically 10% of the parts are located on the
secondary side.  I would like to know what the industry considers an
acceptable defect rate in PPM coming into a subassembly test department,
after an in-house QA lot inspection, and rate from an outside PCA house.
My QA department has a certain threshold in mind before something is a
"problem".  I want to know if their threshold is at least in the ballpark
of the industry.  Thank you.

Best Regards,

Mike Forrester
LeCroy Corp.
[log in to unmask]

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