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September 1998

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Subject:
From:
Jay Tsai <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 30 Sep 1998 16:25:53 -0700
Content-Type:
text/plain
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text/plain (75 lines)
Or you can consider to use epoxy base soldermask plug-in.


On Tue, 29 Sep 1998 18:08:02 -0400
"Wolfe, Robert" <[log in to unmask]> wrote:

> There is no problem with tented vias under chip type parts, however the
> solder mask cannot be dry film it is too thick, and if using LPI the via
> better be small enough to cover it adequately.
> Robert M. Wolfe
>
>         -----Original Message-----
>         From:   glenn pelkey [SMTP:[log in to unmask]]
>         Sent:   Tuesday, September 29, 1998 4:41 PM
>         To:     [log in to unmask]
>         Subject:        [TN] Fab/Assy:  Vias under chip components
>
>         Does anyone see a problem with placing a via under a chip capacitor?
>         The via will be tented with dry film soldermask.  Assembly will be
> with
>         epoxy or screened solder, reflow, and DI water clean.
>
>         The potential for electrical shorts and remaining contaminates has
> us
>         concerned.
>
>         Thanks in advance for any input.
>
>         Glenn Pelkey
>         [log in to unmask]
>         [log in to unmask]
>         Maxtek Components Corp.
>
>         ______________________________________________________
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