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September 1998

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Subject:
From:
Scott Holthausen <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 30 Sep 1998 15:32:09 -0400
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Technetter's

This question sparked one of my own:  Does anyone have experience putting
through hole vias on or in the pads of chip components?  Pros & Cons anybody?

Thanks
Scott Holthausen

At 01:40 PM 9/29/98 PDT, the whole world held its breath while Glen wrote:

>Does anyone see a problem with placing a via under a chip capacitor?
>The via will be tented with dry film soldermask.  Assembly will be with
>epoxy or screened solder, reflow, and DI water clean.
>
>The potential for electrical shorts and remaining contaminates has us
>concerned.
>
>Thanks in advance for any input.
>
>Glenn Pelkey
>[log in to unmask]
>[log in to unmask]
>Maxtek Components Corp.
>
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