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September 1998

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Subject:
From:
bob metcalf <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 2 Sep 1998 10:47:59 -0700
Content-Type:
text/plain
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text/plain (88 lines)
John, artwork marking is a common problem when applying LPI coatings
via spray or curtain coating systems. Both of these systems require a
thicker deposit of LPI. During the exposure process the mylar side is
compliant to the solder mask surface while the glass side is not. The
glass flattens the solder mask giving the artwork marking or shiny
surface areas you describe.

The best way to eliminate or reduce the problem is to improve the drying
of the solder mask during the tack dry cycle. This would best be
accomplished by increasing the dwell time in the oven. You may be able
to remain at the same temperature or you may have to slightly reduce the
temp to insure you don't over dry the LPI.

Another method is to match the phototool to the mask surface. If using a
gloss solder mask, use a gloss phototool. When using matte LPI use a
matte phototool. This should also help reduce the artwork marking.

While artwork marking is considered a cosmetic condition, it is not
uncommon for end users to reject boards because of it. This is especially
true if the board is used in an application where the solder mask is visible
to the final consumer of the product the board is used in.

I hope the above suggestions are useful. If you need further help, give me
a call.

Bob Metcalf
Morton Electronic Materials
714-730-8356

>>> John Lennox <[log in to unmask]> 09/01/98 02:05pm >>>
TechNet:

We are getting a condition known as "artwork marking" when exposing
LPI
soldermask. This condition exhibits itself as shiny areas where the
artwork
comes into contact with any high spots on the mask.
Although it appears to be totally cosmetic, we have a few customers
who
refuse to purchase boards with this condition.

We primarily use Electra EMP110 soldermask with a Teledyne DSA 2000
spray
coater. The panels are then tack dried in a tunnel oven for 45 minutes at
180F.

When imaging the panels, the top side (against the mylar) seems fine but
the bottom (against the glass) is marked. The degree of marking varies
depending on the surface of the board.

Has anyone else seen this problem, or had the need to eliminate it?
Also, what method do you use to ensure sufficient tack dry prior image, if
any?

Any responses would be appreciated

Thank You
John Lennox
Process Engineer
EMC

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