Electricity follows the path of least resistance.  This is true in an
electro-plating cell.

When designers create a board that has dense areas and areas with very
isolated circuitry,
the isolated circuits act like antennas in the plating cell and they get
more than their share of the plating.
When lines plate thicker than the rest of the board it is very hard to
control line width and spacing.  It
is also dfficult to cover the high traces with solder mask.

One approach has been to panel plate the copper.  After drill the panels
are electroless copper plated to activate the holes and then are plated
copper full thickness everywhere.  Then they are imaged and etched or
imaged, solderplated, resist stripped and etched.  Several problems with
this approach are; etching fine lines and spaces is impossible when the
copper thickness is too great and you waste a lot of copper plating the
background areas that are going to be etched off, and the panel plating
is never as uniform in thickness as you would like causing difficulty in
etching uniform line widths accross the panel.

Another approach has been to add thief to the areas where the circuits
are isolated.  There are computer programs that will automatically add
in dots or squares to any area that does not have conductors.  Usually
the size of the gap that has to exist before the dots are added is
adjustable.  If you have a concern about the thief cross-talking to your
circuitry or causing migration shorts, the answer may be to have the
designer use smaller dots for the thief and tell him they are not
allowed within a specified distance from the lines.  If you delete teh
thief completely lyou can expect poor yields from the board shop with
commensurate longer lead times and higher costs.

> -----Original Message-----
> From: Paul Truit [SMTP:[log in to unmask]]
> Sent: Friday, September 18, 1998 9:29 AM
> To:   [log in to unmask]
> Subject:      [TN] copper thieving
> Question:
> I'd like to know some background on copper thieving what it's exactly
> used
> for, how long has it been in use, etc.
> I'd also like to know if this has any affect on the calculation of the
> creepage distance between the high voltage (primary) side and the low
> voltage
> (secondary) side of a UL approved board.  Say we had a 10mm distance
> between
> primary and secondary, now 3 rows of 1mm dots are spaced evenly
> between the
> two sections, does this have any impact on the UL specifications on
> creepage distances?
> Thanks
> Paul Truit   Mfg Eng
> RBB Systems, Inc.
>

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