IPC-D-275 Table 3-1 lists the spacing required.  If you have 2000V on
     a board with permanent polymer coating (class B4) on an external
     layer, the spacing required would be 0.00012 * 2000 = 0.240".  On an
     internal layer it would be 0.0001 * 2000 = 0.200".

     All have a good weekend,

     Steve Sarasin
     ([log in to unmask])



______________________________ Reply Separator _________________________________
Subject: Re: [DC] FW: pcb design rules
Author:  [log in to unmask] (JoAnn Amerson) at SMTP
Date:    9/18/98 12:31 PM


On 18 Sep 98, Ken Brown wrote:

> LOOKING FOR DEESIGN RULES FOT PCB LAND SPACING VS VOLTAGE  NEED TO APPLY
> 2KV BETWEEN LANDS AND CONNECTOR PINS.

Hi Ken -

You are trying to compare apples and oranges.  Voltage determines the track
widths needed, current determines the spacing between traces, pins, etc.  At
least I'm fairly certain about this answer.  I'm sure there will be better answe
rs
forthcoming.  :-)

Jo

JoAnn L. Amerson
Design Librarian
Red Lion Controls, Inc.
E-mail: [log in to unmask]
Voice: (717) 767-6961 ext 6308


Thought for the day:
  We should seize every opportunity to give encouragement.
  Encouragement is oxygen to the soul.
       -George M.Adams

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