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September 1998

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DesignerCouncil <[log in to unmask]>
Subject:
From:
Ed Murphy <[log in to unmask]>
Date:
Tue, 1 Sep 1998 08:32:04 -0400
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Karl Bates <[log in to unmask]>
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"DesignerCouncil E-Mail Forum." <[log in to unmask]>, Ed Murphy <[log in to unmask]>
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Hi Bock

you could also have a clearance problem in the hole to the inner layer,
you must put a keepout area around mounting holes so that inner layer
copper layers are kept away from the inside of the hole (clear??)
this does not show up until you insert the screw and short together the
copper layers in the hole.

regards
Ed

> -----Original Message-----
> From: Karl Bates [SMTP:[log in to unmask]]
> Sent: Tuesday, September 01, 1998 8:20 AM
> To:   [log in to unmask]
> Subject:      Re: [DC] Short Circuit
>
> I would check to see if any metal parts didn't have a via keepout
> underneath
> them, and when they assembled the PCB the vias shorted to the metal
> case ?
>
> Karl
>
> Bock Ming Gai Joanne wrote:
>
> > Hi all,
> >
> > Currently I'm facing a problem at work. I have a few 6 layers of
> PCBs
> > that are perfectly alright, meaning that they passed the ET.
> However,
> > when our engineers did some testing after board assembly, problem
> > surface. When they tighten the board with mounting screws, they
> found
> > that one of the supply trace was shorted to the Gnd. This was not
> shown
> > during the ET because PCB suppliers only did the test on the bare
> > boards. So now I am looking into what could possibly cause them to
> short
> > together.
> >
> > I appreciate anyone who can help to provide me with a solution.
> >
> > Thanks & Best Regards!
> > Joanne Bock
> >
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