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August 1998

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Subject:
From:
"Dhawan, Ashok" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 26 Aug 1998 15:05:23 -0500
Content-Type:
text/plain
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text/plain (170 lines)
I fully agress with Jack.This reminds me one statement which was made by
Don Burr , X-Unisys(currently with cyberoptics) when he visited our
facility in 1995,  that the strength of a joint is contribted by:
Heel joint; 70%
Base and side Joints : 20%
Toe joint : 10%
That conforms Jacks' statement.


Ashok Dhawan P.ENG.
Manufacturing Engineering
Unisys Canada Inc.
51 Burmac Road
Winnipeg R2J4C9
CANADA
Fone 204-257-9199
Fax   204-257-9104


> ----------
> From:         Jack Crawford[SMTP:[log in to unmask]]
> Sent:         August 26, 1998 2:43 PM
> To:   [log in to unmask]
> Subject:      Re: [TN] reforming a SOIC
>
> Please refer to current documents J-STD-001B and/or IPC-A-610.  The
> heel fillet is
> the most critical part of the solder joint on a gull lead device.
> Insufficient heel
> fillets even with max to the top side/toe fillets are NOT acceptable
> for any class
> product.  There is high probability of cracking of the side/toe
> fillets with minimal
> normal thermal excursions if there is not heel fillet.  Conversely, a
> proper heel
> fillet will survive a lot of environmental stress screening even if
> there are no
> side/toe fillets.  This topic has been discussed as great depth in IPC
> technical
> meetings in the past.  There are no plans to change these requirements
> in the C
> revisions now out for proposal on both the documents.  Jack
>
> IPC HAS A NEW PHONE SYSTEM!! EXTENSIONS HAVE CHANGED!!
> Be sure to listen to the prompt for new directions.  8/20/98
>
> IPC/SMTA Electronics Assembly Expo
> Technical Committee Meetings, Conference, Exhibits
> Providence RI   October 24-29
> More info at http://www.ipc.org
>
> Jack Crawford, IPC Project Manager - Assembly
> 2215 Sanders Road, Northbrook IL  60062-6135
> [log in to unmask]   NEW DIRECT NUMBER   847-790-5393
> fax 847-509-9798
>
> >>> PELCHAT_JM <[log in to unmask]> 08/26/98 07:18AM >>>
>         If I were the Customer, I would rather leave the leads alone
> and
>         rely on the toe and side fillets than even attempt to reform
> the
>         leads.  Particularly on Class 3 product.
>
>         The reforming would require buyoff from the Customer and if
>         they're going to buy off on anything, they should buy off on
> the
>         lack of a heel fillet.
>
>         If you get good wetting on the toe and sides, that is by far
> the
>         preferred scenario.
>
>         Depending on how many boards you have with this situation
>         (hopefully, not too many otherwise it should have shown up in
>         prototyping) it may be better to have the components hand
> placed
>         and soldered for optimum pad to lead interface and to give
> every
>         advantage to good solder filleting.
>
>         Jan Pelchat
>
>
> ______________________________ Reply Separator
> _________________________________
> Subject: [TN] reforming a SOIC
> Author:  "Collins; Graham" <[log in to unmask]> at 0UTG0ING
> Date:    8/26/98 8:54 AM
>
>
> Technetter's
> Let's say a customer designed a board with the wrong pad size, too far
> apart, such that a gull wing lead placed on the pad doesn't have a
> heel
> fillet.  Obviously a bad thing.  A redesign is in progress, but in the
> interim it has been proposed that the part be reformed to spread the
> feet a
> bit further apart (by about 20 thou).  Component is a 20 lead SOIC.
>
> My questions and concerns are:
>  - the bend will have to occur at the point where the lead enters the
> component body, otherwise there will be no clearance between the part
> and
> the board.  How dangerous is this from a reliability perspective
> (class 3
> product, conformally coated)?  Should I take the next few weeks off?
> Flee
> the country?  Anyone have job openings?
>
>  - do any technetters have suggestions of a half decent way to reform
> these?
> I'm currently faced with doing it to about 100 to 150 parts, and doing
> it by
> hand does not appeal to me due to the variability.
>
> Any other suggestions?  I did consider borrowing some of the Freeze-it
> that
> Steve's using on his diodes, and shrinking the boards, but the reflow
> process might disagree with that...
>
> thanks!
>
> Graham Collins
>
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