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August 1998

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Subject:
From:
V B VENKATESH <[log in to unmask]>
Reply To:
"TechNet E-Mail Forum." <[log in to unmask]>, V B VENKATESH" <[log in to unmask]>
Date:
Mon, 24 Aug 1998 17:44:25 +0530
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Any High Voltage test is destructive. Longer you do more life you are taking out of the product.

It is advisable to negotiate with the customer to do only sampling test but first you have to ensure that your process is perfect (nearly) to come to this stage. (Self Certification)

V.B.Venkatesh
http://www.hical.com

-----Original Message-----
From:   Paul Gould [SMTP:[log in to unmask]]
Sent:   Monday, August 24, 1998 3:56 PM
To:     [log in to unmask]
Subject:        [TN] Dielectric Strength

Hi all,

I have been looking back at information on dielectric strength testing,
mainly from Ralph, and have a question.

I understand that the maximum which should be used for testing inner layer
tracks is 50 V/mil. I have a test which is carried out on tracks with 12
mil spacing where we apply 500 Vdc for 5 seconds. This test is carried out
twice on some tracks but is repeated twice more, once after assembly at our
customers end, and again at their customer's also.

My question is, if this test is repeated several times does this lead to a
greater likelihood of inducing a defect in an otherwise good PCB?

Any responses would be greatly appreciated.

Paul Gould

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