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August 1998

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Subject:
From:
"Dhawan, Ashok" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 7 Aug 1998 15:51:16 -0500
Content-Type:
text/plain
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reply on technet . However, In case somebody have material -articles/
publications/ books/ specs to mail/ fax me , here is my mailing address.

thanks.


Ashok Dhawan P.ENG.
Manufacturing Engineering
Unisys Canada Inc.
51 Burmac Road
Winnipeg R2J4C9
CANADA
Fone 204-257-9199
Fax   204-257-9104
Email: [log in to unmask]
> ----------
> From:         Dhawan, Ashok
> Sent:         August 7, 1998 3:56 PM
> To:   'IPC'; 'IPC TechNet'; 'IPC Technet'
> Subject:      Gold Immersion and planarity
>
> For fine pitch devices 15.7 mils and small chips 0603 ,do we have any
> IPC standard stating that what kind of surface leveliing /planarity
> required for placement of FPDs and 0603/0402 chips.Even accurate
> placement can go offline once the surface is not flat. the situation
> is worse when we are trying to place 0603 components on glue dots.
>
>
> Also, there are no. of options for HAl alternatives . We are comparing
> gold immersion and OSPs.Our circuit boards are having fine pitch
> devices extendable to 12 mils QFPs and 50/60 mils BGAs and chips down
> to 0402 package size.We also intend to implement No-Clean process in
> near future.  We have limited experience with Au immersion/Ni
> electroless  and OSPs.
> What are  views of experts who had some point of time decided course
> of action. What you think we go for?We want to go for process where we
> do not have to modify /readjust our current process based on water
> soluble soldering. Pro and Cons?
>
> Not to mention that I consider technet as my vital tool for problem
> solving. I will appreciate comments on this asap as I am running out
> of time and our process meeting is scheduled on Monady morning.
>
> thanks
>
>
>
>
>

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