Hi Nancy,
The old requirements that I am more familiar with come from MIL-P-55110
and may be rolled into the newer IPC specs (6011 and 6012).  Rework
simulation of plated through holes IAW IPC-TM-650 method 2.4.36 had to
successfully be completed five times (soldering and unsoldering of a test
wire) and then undergo microsection and subsequent inspection.  This
test, in my opinion, is a worst case scenario based upon the amount of
localized energy being injected into a small cross-sectional area of the
PWB.  When reflow or wave soldering, the same cross-sectional area does
not consume the same amount of energy.  I would contact your supplier and
determine what qualification procedures are being used.  Hope this helps.

Steve Sauer
Xetron Corporation
513-881-3368
[log in to unmask]

 ----------
From:  [log in to unmask][SMTP:[log in to unmask]]
Sent:  Tuesday, July 21, 1998 3:01 PM
To:  [log in to unmask]
Subject:  Re: [TN] PCB Maximum Heat Excursions

Hello All.....

Is anyone aware of a study that quantifies the maximum number of heat
excursions that should be attempted on a typical FR-4 difunctional
material?  These excursions would include HASL, Wave, Reflow and Maximum
Rework Hits. Does this improve with the use of 140 Multifunctional
material?

Sincerely,

Nancy Nelson
Dell Computer
PCB Quality Development
Phone 512-335-9657


> -----Original Message-----
> From: [log in to unmask] at dell_unix
> Sent: Friday, July 17, 1998 12:55 PM
> To:   McMillan, Thad; Nelson, Nancy;
> Subject:      RE: [TN] Bull****:: ADMIN RESPONSE
>
> WAIT...
>
> Before everyone goes crazy, I am on the phone with MCI TechSupport as
> I write th
> is,
> to get this guy shut down.  Everything is under control....
>
> Hugo Scaramuzza
> Electronic Communications Administrator
> IPC
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