[log in to unmask] wrote:
>
>      Hi everyone!
>
>      I would be appreciative of any help whatsoever on the following
>      subject:
>
>      I am currently assessing the suitability of using no-clean flux
>      technology on Class 3 Electronics - Military.  Our current capability
>      is double sided Reflow (forced convection), Vapour Phase & Wavesolder.
>      We assemble onto the following substrates - FR4, Copper Invar Copper,
>      Ceramic.  SMD design is currently @ 0.02" pitch, whilst currently
>      evaluating 0.016" & BGA.
>
>      I am trying to identify all areas of concern with using no-clean flux
>      to enable me to come up with a plan for addressing/proving the process
>      for suitability/reliability.  I believe I have identified the main
>      areas but would be interested in the experience/views of my
>      counterparts in this field.
>
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If you are going conformal coat the PWBs then this will be a concern.
The boards MUST be cleaned if conformal coating is to be used.

Regards,
Brent

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