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July 1998

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DesignerCouncil <[log in to unmask]>
Subject:
From:
Jan Vercammen <[log in to unmask]>
Date:
Tue, 28 Jul 1998 08:58:22 +0200
Reply-To:
"DesignerCouncil E-Mail Forum." <[log in to unmask]>, Jan Vercammen <[log in to unmask]>
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dave, richard,

I have the coordinates of the article concerning the EMC and the
signal integrity of split power planes:

IEEE Circuits & Devices Magazine,  vol 13, no 6, Nov 1997, ISSN 8755-3996
"Crossing the Planes at High Speed", H.J. Liaw & H. Merkelo, pag 22-26

I have reread the article yesterday, it is a compact but clear presentation
of the phenomena at hand. The simulations used are based on FDTD such that
the interpretation is based on the time-domain, which is good for digital
circuit designers. There is an interesting discussion on Spice modeling,
however, I must caution you that the model is only useful for
the higher frequency range (were the slot line impedance is can be
considered as constant).

Regards,

Jan Vercammen
Agfa NV
Mechelsesteenweg 430
B2650 Edegem
Belgium
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