Steve,

This sort of problem has been addressed before. Here are some personal
observations from a few examples like this that I have seen work
through high levels of vibration and thermal cycling.  All designs
call for two single sided surface mount boards bonded to a center
heatsink.  I am from the low board CTE camp as a method to minimize
thermal cycling solder fatigue issues and have been privy to very long
duration testing programs (5000+ -55C to 85C 2 hour thermal cycles)
that show that this method works for even lead less chip carriers.
Here are some points to consider:

1. Custom die's to form leads.  Fancort Industries, Inc. NJ
201-575-0610
   did a great job with the tooling.
2. Low CTE board material.  I have seen four different Kevlar (tm)
board materials used.  Woven Kevlar, and non-woven (Thermount :Arlon
85NT polyimide Kevlar, Arlon 55NT epoxy Kevlar and Hitachi
CIL-???(cant find the call out at this time)).  For commercial space
imaging electronics I currently specify Arlon 55NT because of its low
out gassing and relatively short raw material lead-time.  I can talk
more about the board material selection choices off line if you
like...
3. Bond MCM to board so that some of the vibration and thermal cycle
loads are carried by the bond line.  Options here are epoxies or
elastomers.  Epoxies have lower CTE but are stiffer (not necessarily a
good thing).  Elastomers have higher CTE but are more flexible.  I
have seen both used in thermally and or electrically conductive
flavors.
4. Bond surface mount boards to heatsink with thermally conductive
elastomer.  For al applications I have worked on we used Arlon
Thermount.  Its extremely low shear modulus (50 psi) and very good
damping (Q less than 20) are some of its best traits.  The low shear
modulus material allows heatsinks to have higher CTE (e.g. aluminum
heatsink) than boards with little increased effective board surface
CTE.
5. Low CTE heatsinks with rigid adhesives to constrain high CTE boards
(i.e. AlSiC or BeBeO heatsinks with polyimide glass boards) can suffer
from high bond line shear stresses that CAN cause board to heatsink
delimitation.  This approach has worked for some but I would test this
approach thoroughly before committing to a design.
6. Center core heatsinks add stiffness and conduct heat to mounting
rails.  I have seen Al, AlSiC, AlBeMet, AlB, BeBeO and CuMoCu to name
a few.  The new high K graphite products (e.g., TC1050) look great
too.  The trades that you need to make are $, schedule, weight, K,
etc.  I have seen low CTE heatsinks lower the CTE of Kevlar boards to
a point that there is almost not CTE mismatch between the ceramic
packages and the board surface.
7. Don't trust some of the heritage solder fatigue equations for low
strain (e.g. flexible leads, low CTE mismatch) situations.  They are
too conservative and can steer you away from designs that have been
proven to work better than the heritage analysis would tell you.

My point of all of this is that there are ways to engineer the problem
and come up with a design that can meet the requirements.  The
solutions are often not cheap and require materials that have long
lead times.  The solutions are also controversial.  For every person
you find in one camp, there are others who have completely different
approaches.  Testing of a design using your candidate manufacturing
processes is the best way to prove out a design.  This requires time
to do it right.

If you have any other questions about this topic, please reply.
--
Karl Sweitzer                     voice: 716.47.77546
Eastman Kodak Company             pager: 716.25.33681
800 Lee Road                        fax: 716.47.77293
Rochester, NY 14650-3118         mailto:[log in to unmask]

################################################################
TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
################################################################
To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body:
To subscribe:   SUBSCRIBE TechNet <your full name>
To unsubscribe:   SIGNOFF TechNet 
################################################################
Please visit IPC web site (http://jefry.ipc.org/forum.htm) for additional information.
For technical support contact Hugo Scaramuzza at [log in to unmask] or 847-509-9700 ext.312
################################################################