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June 1998

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Subject:
From:
Chris Halleran <[log in to unmask]>
Reply To:
DesignerCouncil E-Mail Forum.
Date:
Tue, 30 Jun 1998 14:18:03 -0500
Content-Type:
text/plain
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text/plain (62 lines)
Derek,

We've used a hierarchical schematics in Viewlogic Workview Office. One
engineer designed an interface circuit (four sheet schematic) that was used
on five different PCB's. In addition, we pasted the prerouted interface
circuit (using PADS PowerPCB) into the five different PCB's. In this
instance, the hierarchical design proved useful.

I spoke with another engineer that designed a PCB with hierarchical
schematics, hoping to make it easier for someone to understand his design.
He indicated that he probably wouldn't do that again, unless he had to
implement a common interface circuit or something. To make his flat
schematic more readable, he'd identify each sheet with a functional name, or
make a block diagram preface to the schematic.

Here are a few things we've experienced with hierarchical schematics... some
of these are probably unique to Viewlogic:

You need to have different reference designators on the lower level
schematic (we used U700, R700, C700, etc).. otherwise the PCB interface will
rename conflicting parts for you.

Although you can path to an underlying hierarchical symbol and schematic in
a master library, you need to have both in your project folder, or when you
run the PCB interface, the wire list won't be complete.

The XREF utility (adds sheet pointers to dangling nets) doesn't transcend
hierarchical schematics.

If you wanted to output a report with each components' sheet number (for
fault tolerance analysis) hierarchical schematics makes you do some
workaround.

It's not too hard to get used to, but there's the added complexity of having
hierarchical symbols and schematics.... instead of having a 12 page
schematic (file names of SCHEM.1 through SCHEM.12)  your folder might
contain the top level and five different blocks... 6 schematics (some
multipage) and 5 hierarchical symbols.

Nets connecting to the hierarchical symbols may have different names than
those the lower level symbols (the top level would override the bottom
level). This might be helpful for aliasing net names.

There's a hierarichal path to the net names (e.g. $1i3647\~RESET)...
depending on the block that the net appears in. If the net is used on
various blocks (and the main one) then I don't think there is a path.. just
if it appears strictly inside a block.

Regards, Chris Halleran

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