David,
    What I have done on high current pins in the past is to place testpoints
surrounding the affected pin connecting to the same net of course.
(eight of them in a octagon pattern) then
use a copper pour (areafill) surrounding those pins on the other layers
where possible.   The reason I use testpoints, is that they stay put and
don't disappear.  Test point size is typically .038 drill, .058 land.
Can't help you too much regarding the unsolderability / repair / thermal.
But this does carry extra current.
Karl

David Baldwin wrote:

> Designers Council:
>
> I am designing a board which has heavy current devices, required to handle
> 10A max peak.  The board will be constructed using 2 oz. copper.
>
> IPC-D-275 5.3.2.3. states:
>
> "Total cumulative copper web for all layers in any plated through hole
> should not exceed .160" for 1 oz. copper, or .080" for for 2 oz. copper.
>
> The total of the thermal relief cross sectional area divided by the number
> of planes connected to the plated through hole, shall not violate current
> carrying capacity requirements for a given hole.
>
> If the individual web width violates the intended minimum conductor width
> it shall be specified on the master drawing."
>
> If I use the web width calculations, or even the .080" max web width for 2
> oz copper, it's not going to handle the current without getting really hot.
>  If I connect the hole directly into the plane, we'll have a difficult time
> soldering it.
>
> What is your recommendations and experience with this type of situation?
>
> Thanks in advance for your advice and input.
>
> David Baldwin
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>
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