Paul,

Haven't really heard it stated as rf "leakage current",
but that's only been my experience.  I've heard it
referred to as "crosstalk".  Proper spacings and
circuit partitioning with regard to return currents
are some suggestions for reducing it.

How is it modeled?  I've seen it modeled as parasitic
lumped parameters of resistances/inductances/capacitances
anywhere you can put them between parts and/or constructions,
i.e. modeling resistors as a system of components, traces,
power planes, ground planes, wires, ...

My own basic rule of thumb is that parasitics vary directly
with proximity.  That is to say, the closer your parts are,
the more parasitics/crosstalk have as an effect.

Don't know if that answers your question ...

Regards,  Doug


Paul Peters wrote:
>
> Dear Council Member,
>
> I have a quick and a simple question for you, I hope you have a
> simple answer.
>
> How would you lay out the PCB to minimize RF Leakage Currents. In
> other words would layout of the PCB has any affect on the leakage
> current and if it does how to minimize the leakage current.
>
> Secondly Transformers play a big role in RF leakage Current. If
> Transformers are # 1 suspect, How would you minimize RF Leakage
> Current. Or in other words what causes Leakage Current and How can it
> be minimized. What is the model for leakage current through a
> transformer for analysis purposes.
>
> I would appreciate an answer from you.
>
> Thank you,
>
> Paul

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