The exact tolerances that can be maintained at etching will depend on
three things:

1.  The capability of the board manufacturer.  This will of course
vary considerably.  It will depend on both the chemistry used, and
the amount of process control used.

2.  The copper weight being etched.  The heavier the copper the more
tolerance that will be needed to make this a manufacturable board.

3.  Part design.  Parts with many parallel, tightly spaced lines are
the most difficult to properly etch.  Also, because there is no
plating to contend with, inner layers are easier to etch than outer
layers.

Consequently, +/- 20% may be very easy to achieve on a wide line and
may not be enough tolerance on a narrow line or on heavy copper.  As
a general guideline, most shops should be able to maintain an etching
tolerance that is 1.5 - 2.0 times the copper thickness (per side of
the trace).  If you think about the fact that etching is a chemical
reaction, and that as it etches it will etch equally in all
directions, you will realize that the best that could possibly be
hoped for is a direct 1:1 ratio (or 1.0 times the copper thickness).

Ex:  One ounce copper is nominally .0014 inch thick.  An etching
tolerance of .0014 X 1.5 = .0021 per side for a total tolerance of
+/- .004 inch.


> Date:           Thu, 2 Apr 1998 16:05:45 -0700
> From:          Steve Collins <[log in to unmask]>
> Subject:       DES: IPC 6012 Trace width tolerance - RF Applications

> This message is pointed to those of you involved in RF circuitry I think.
>
> The IPC-6012 specification for trace with tolerance of ±20% is coming under
> fire here. Typically what can most PCB fabricators hold for trace width
> tolerance regardless of what IPC says. How do other RF designers specify
> trace width tolerances in critical circuits.
>
> Steve Collins
> PCB Design Supervisor
>
>
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