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April 1998

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Subject:
From:
John Waite <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 24 Apr 1998 19:57:53 -0400
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Hi Scott,
    Hmmmmmmmmmm..  Interesting scenario.  I need to ask a couple of obvious questions first.
    Is the copper equal on both sides BEFORE You run the boards through the the soldering
process?
    Does the top side contain heavy shield as opposed to the bottom side?  If so, then you have a
low current density area that is not plating both sides equally.
    If not, Then the plating anode placement is out of whack.
This is a tough question to answer without a lot more detail.  If you Email me, I can Talk some
more detail.  JOHN WAITE

Scott M. Severson wrote:

> Hi All,
>
> Another question for who can ever answer it.
>
> What factors affect the dissolution of plated copper into solder during the
> soldering process?  Lets ignore the soldering parameters (temperature,
> composition, wave/pot turbulence....) and focus on the copper plating.
>
> We have PCBs that are seeing a 50% reduction in plated copper thickness
> during a standard IPC TM-650 thermal stress.  We've cross-sectioned enough
> thermal stressed boards to know that this isn't normal.   Another question.
>  We are consistently seeing the reduction on the top side of the board (the
> side that doesn't come in direct contact with the molten solder), why the
> top side and not the solder side?
>
> The boards are 14 layer with 4 2oz copper power/ground planes.
>
> Thanks
>
> Scott Severson
> Benchmark Electronics Inc.
>
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