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April 1998

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From:
Martin Abay <[log in to unmask]>
Date:
Wed, 1 Apr 1998 07:43:42 PST
Content-Type:
text/plain
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"TechNet E-Mail Forum." <[log in to unmask]>, Martin Abay <[log in to unmask]>
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text/plain (34 lines)
Hi guys,

Please help me out on this. I need your help regarding the exact
definition of de-wetting defect on smt land or pad (PCB manufacturing)
Based on the IPC definition, the way I understand it, is that,
de-wetting is a defect that is caused by the failure of solder
coating/plating process to coat the copper surface evenly. The solder
coating is unevenly distributed on the copper surface. Thus, there is
thin and thick coatings on the surface. Am I right? What's the
accept/reject criteria for this defect? What is the minimum and maximum
thickness of solder coating?
Thank you very much for your time. I'll be waiting for your responses.

regards,
Martin

P.S. I'll appreciate it very much if you can send me a photo via
attachment file.

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