Charles,
I don't have any experience with "operating voltages" that high.
I've designed boards for "transient voltages" used in product testing
that go that high, but not for operating voltages that high.
Perhaps someone here does.
Anyway, you asked for any assistance so here goes ...
For agencies such as UL, they define TWO different types
of creepage distances. One is BASIC and the other is REINFORCED.
BASIC insulation is from HOT to GROUND.
REINFORCED insulation is from HOT to SECONDARY.
Whatever the creepage for BASIC ends up being,
REINFORCED is always twice that distance.
Just as an example, let's say you have a power supply. If the HOT traces
need to be 8.0 mm away from GROUND, then the distance between the HOT
traces
and any trace in the SECONDARY side circuits is automatically twice that
distance or 16.0 mm. This is out of UL-1950 - a product safety standard
that covers a wide array of products tested by UL. One of the things
they speicify for product approval is the construction of pcbs.
You might try calling any one of the many UL labs around the US,
ask for an engineer who's specialty is UL-1950, and pose this
question to him/her. Their website is
http://www.ul.com/
Without knowing anything about the circuit or the product into
which it goes, I looked at the creepage table in the UL standard.
IMO, the 0.600 creepage distance requirement seems a little low
for the voltage of concern. That's for coated outer layers.
For inner layers, you "should" be able to get away with less
than that but I'd check just to be sure.
Regards, Doug
[CMCD]Charles wrote:
>
> Along the same lines we are designing a high voltage board [3000v] and have
> a spacing requirement on the external layers of .440 clearance .600
> creepage. How would we determine the clearances on internal layers?
>
> Thanks for any assistance,
>
> Charles and the Design Team at CMCD
> [============================================]
>
> On Monday, April 13, 1998 12:15 PM, Douglas Mckean
> [SMTP:[log in to unmask]] wrote:
> > The only time I've run into constraints with trace width is
> > with controlled impedence designs. As a general rule I'm
> > afraid I'm not that well versed to say.
> >
> > In regards to your trace width versus trace spacing ...
> > Trace spacing is determined by voltages on the trace.
> > If I read your question correctly, the trace can be as wide
> > as you want as long as the voltage on the trace doesn't change.
> > In other words, you could have a trace 1 inch wide for current
> > or temp requirements AND require only an 8mm spacing for voltage
> > requirements.
> >
> > Regards, Doug
> >
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