Along the same lines we are designing a high voltage board [3000v] and have
a spacing requirement on the external layers of .440 clearance .600
creepage. How would we determine the clearances on internal layers?

Thanks for any assistance,

Charles and the Design Team at CMCD
[============================================]

On Monday, April 13, 1998 12:15 PM, Douglas Mckean
[SMTP:[log in to unmask]] wrote:
> The only time I've run into constraints with trace width is
> with controlled impedence designs.  As a general rule I'm
> afraid I'm not that well versed to say.
>
> In regards to your trace width versus trace spacing ...
> Trace spacing is determined by voltages on the trace.
> If I read your question correctly, the trace can be as wide
> as you want as long as the voltage on the trace doesn't change.
> In other words, you could have a trace 1 inch wide for current
> or temp requirements AND require only an 8mm spacing for voltage
> requirements.
>
> Regards,  Doug
>

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