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March 1998

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Subject:
Re: Vias filled with solder for ICT testing
From:
JGibdozer <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 10 Mar 1998 12:20:16 EST
Content-Type:
text/plain
Parts/Attachments:
text/plain (22 lines) 
Typically, this can be done at the paste screen print operation during
assembly. Exposed vias for test on the secondary side that are ' mask-plugged'
on the primary side can be filled with solder paste and reflowed. This
increases the probe area for improved contact. Consult with your assembler for
stencil opening diameter and  paste volume etc.

Regards,
Joe Gibson
HADCO

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