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March 1998

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Subject:
From:
"Hamilton, Richard -4454" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 16 Mar 1998 10:03:36 -0700
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Mike,

I use like to think of 100% as being an end-to-end test of each path of
every node.

Hope this helps.

Richard Hamilton
Clemar Mfg. / Rain Bird
[log in to unmask]

> -----Original Message-----
> From: Hill, Mike E. [SMTP:[log in to unmask]]
> Sent: Friday, March 13, 1998 2:19 PM
> To:   [log in to unmask]
> Subject:      [TN] !00% Electrical Test
>
> I looking for your definition of 100% Electrical Test of bare boards.
> For example,  do you include all feed through vias on the wiring side
> in
> your test data file? If you add these, many may not be used in the
> customer's assembly test but they often cause false errors in bare
> board
> test due to Soldermask in the holes.  Do you include all plated
> Tooling
> holes?  Do you call it 100% if you test part of the board and AOI on
> another part?  Do you only test/probe end of nets?   Do you always
> probe
> gold fingers?
>
> I would like to hear what how you define it.
>
> Mike Hill
>

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