Ed, Fred, Ray, Mike, John, Sue, Everybody,



     Some additional info.



     A micro-section of the ASSEMBLED PCB indicates that the three holes
     tested are

     in accordance with IPC-6012 except for ring voids on layers 5/6 and
     delamination

     of layers 5/6. Cu thickness, Plating folds/inclusions, glass fiber
     protrusion,

     wicking, external foil cracks, barrel/corner cracks, external lane
     separation,

     and lifted lands were not present. The hole wall plating thickness
     averaged

     .00132.



     A horizontal microsection has not been performed.



     The reason for thermal reliefs on only two of the plane layers is a

     short-coming of the CAD software. The software cannot automatically
     generate

     them on split plane layers. However, this was not perceived as a
     problem

     based on the industries trend toward non-thermally tied vias.



     I don't have any electronic glossies of the microsection, only a hard
     copy.



     Thankyou all,



     Rick

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