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March 1998

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Subject:
From:
"Leslie O. Connally" <[log in to unmask]>
Reply To:
Leslie O. Connally
Date:
Wed, 11 Mar 1998 08:39:49 -0800
Content-Type:
text/plain
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text/plain (62 lines)
Hi Michael,

I hope you have better luck in plugging Vias with solder than we did. The main
problem seems to be getting a fully filled plug. There always seems to be a
bubble in the solder either from flux outgassing, moisture, or some other
phenomena. Any future thermal cycling seemed to blow the solder out of the via,
probably to the expansion of the void in the solder. We have found that an
epoxy fill and plate over the via is the better solution.

Good Luck,

Les Connally
X1Les @TI.com

>  From: MICHAEL DODSON <[log in to unmask]>, on 3/9/98 4:41 PM:
>  Hello,
>
>  Searching for feedback on the requirements for ICT testing.
>
>  a.) Do the vias need to be filled with solder?
>  b.) Do the probes need to make contact with the center of the via
>  or should the probe contact the via pad only?
>
>  I have a customer who is requiring the solder side vias be filled
>  with solder and the component side vias plugged with mask. I've
>  explained that via plugging with mask is not an issue, but I can not
>  guarantee 100% solder filled vias after HASL. The customer is telling
>  me their ICT test fixture needs to probe the center of the via.
>  (10 layer board / double sided SMT's)
>
>  What is your experience and advice?
>
>  Michael Dodson
>
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