Fellow Techies,

     I need your help!!

     Here's the situation. We have an eight layer PCB with four internal
     planes. Layers 3 and 4 of the planes have thermally relieved vias,
     layers 5 and 6 do not. The via size is .018 +.000 -.018 finished and
     are tented with soldermask.

     The problem is that ring voids occur sporadiclly on layers 5 and 6
     (non-thermal ties) after multiple thermal excursions during assembly.
     A microsection of the board has confirmed this.

     I contend that the board was fabricated improperly using lower grade
     FR-4 and in conjunction with other issues such as low ductility copper
     and no thermal ties caused this problem. I am a PCB Designer so I may
     be biased.

     The assembler is saying that this is purely a design issue based upon
     the fact that no thermal ties were provided.

     In all my resarch no one (including fab houses) has indicated that
     this problem is related to the lack of a thermal.


     Any insight would be greatly appreciated.

     Rick

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