Matthew, Daniel, ...
First of all, IPC-6012 which supersedes IPC-RB-276 (point 3.4.4) specifies
now 0.75 % for boards that uses surface mount components.
We specifiy .6 % , we don't have any increase in PCB cost but most of our
suppliers gave us the feedback that this is tight for them. BUT we RARELY
have issus on warping (by the way our PCB are HASL...for the moment, double
side active). The reason why we put this spec that tight is because we
KNOW we will have problem assembling boards with .75 % warpage (ex: 90 mils
on a 12 inches long board...is too much) and we want our supplier to be
aware that this specification is important for us.
ALaberge
Matrox Electronic systems
quality Eng.
At 06:52 AM 98/02/19 -0500, you wrote:
>Matthew,
>
>IPC 275 specs out a multilayer .060" thick board as having a flatness
>requirement of 1% which equates to .010" / inch.
>
>Most of the time we receive boards that are well within the spec and we
>process them with no difficulty. When an occasional lot of boards are
>received that are on the high side of the spec we experience all the
>problems you described.
>
>Do you specify a tighter tolerance with your pwb shop. Does this tighter
>spec cause an increase in pwb cost. ( According to IPC to reduce the spec
>to .5% or .005" / inch reduces yields.
>
>I am curious as to what you and the majority of the industry is
>specifying.
>
>Thanks,
>
>Dan Shea
>Sr. Manufacturing Engineer
>The Foxboro Company
>Tel # 508-549-2410
>Fax # 508-549-4379
>Email: [log in to unmask]
>
>
>-----Original Message-----
>From: Matthew Park [SMTP:[log in to unmask]]
>Sent: Wednesday, February 18, 1998 6:53 PM
>To: [log in to unmask]
>Subject: Re: [TN] PCB warpage -Reply
>
>JIm,
>
>By the look of your message, you must be a quality eng/mgr or
>sales eng/mgr. No harm if i am wrong. Qual/'sales eng/mgr's
>usually like to go by the book and process/mfg eng's like to go by
>what work and what not work. To get to my points, IPC-275 Bow
>& Twist spec should be in a permanent storage. Boards that
>are closer to 0.01"/inch spec causes some problems in smt
>manufacuring and th wavesolding.
>
>They introduces printing registration inaccuracies, uneven
>solderpaste depositions and solderpaste skips. They go thru
>bumping rides during p/p placement cycles and off-placements
>of plcc's, qfp's and bga's are visible. They wont transfer thru
>edge conveyors without an operator assistence. Some chip
>components get disloged due to the springness of boards and
>slight vibrations. They cause more open solder joints.
>
>They allow flooding of solder on comp side during
>wavesoldering and prevents solder wetting on the highest area
>of warped boards. It becomes more important to have flat
>boards with advancement of finer qfp's and bga's.
>
>Bow & Twist spec of 0.002"/inch or less is better suitable for SMT
>assy. I know a lot of board fab shops won't guarantee with hasl
>boards.
>
>regards
>Matthew Park
>Automation Engineer
>NII Norsat International Inc.
>
>>>> Jim Mathis <[log in to unmask]> February 18, 1998 2:27
>pm >>>
>I spec'd out .01"/inch, also, which used to be the spec. IPC-275
>section
>5.2.5.2 now specs Bow & Twist in terms of percentages. If you
>don't have a
>copy of IPC-275, let me know and I'll fax you the appropriate
>pages.
>
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