TECHNET Archives

February 1998

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Christy Graham <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 10 Feb 1998 10:47:24 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (23 lines)
A castellation is a recessed metalized feature on the edge of a leadless
chip carrier that is used to interconnect conducting surface or planes
within or on the chip carrier.  This definition is from IPC-T-50E "Terms and
Definitions for Interconnecting and Packaging Electronic Circuits".


>>> <[log in to unmask]> 10 Feb 98  10:22am  >>>
Can someone please give me a definition of "castellated" in regards to
Surface Mounted Components.  My dictionary just refers to battlements
and supporting castles.

################################################################
TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
################################################################
To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body:
To subscribe:   SUBSCRIBE TechNet <your full name>
To unsubscribe:   SIGNOFF TechNet 
################################################################
Please visit IPC web site (http://jefry.ipc.org/forum.htm) for additional information.
For the technical support contact Dmitriy Sklyar at [log in to unmask] or 847-509-9700 ext.311
################################################################


ATOM RSS1 RSS2