I agree with Jerry Cupples' input with respect to improving ICT test pin
contact. Test pin selection and maintenance are of prime importance.
Keep in mind that you may still run into contact problems if you use no
clean paste to coat the test points, but contact yields should still
improve.
One option that was not mentioned is that if you're looking for an
immediate yield increase with respect to test pin contact, program the
ICT to perform multiple "suck-downs" prior to testing each board. This
will allow the test pins to break through surface coatings. Keep in mind
that this will affect the tester maintenance schedules (including pin
wear).
Original notes:
>Wolfgang Erat said:
>
>>One of my customers is experiencing contacting problems at ICT on Entek
>>finished boards. How can I help my customer with this ? I have heard
>>about "Twister" testpins, increasing contacting force, tightly
>>controlling initial thickness of the coating itself etc.
>>What is your experience, What works in real life ?
>
>I recommend that you print solder paste on the test points so that it will
>reflow and leave a tin-lead surface. You can use a "spearpoint" test pin
>which has a higher normal force to break the organometallic coating, but it
>seems to me that modifying your stencil is a fairly inexpensive and
>effective way to deal with this.
>
>By design, most test points are clear and will take paste & reflow on top,
>or wave solder automatically if that's your process.
>
>I consider my life to be real. Maybe not - i.e., you are all just actors in
>the ongoing tragi-comedy drama. If this is fiction, thanks for all the
>effort out there, and your question is moot.
>
>
>regards,
>
>
>Jerry Cupples
>Interphase Corporation
>Dallas, TX USA
Yves Trudell
Quality System Engineering
Nortel, Wireless Networks Calgary
>----------
>From: Jerry Cupples[SMTP:[log in to unmask]]
>Sent: Tuesday, January 06, 1998 4:19 PM
>To: [log in to unmask]
>Subject: Re: [TN] Entek boards / In Circuit Testing problems
>
>Wolfgang Erat said:
>
>>One of my customers is experiencing contacting problems at ICT on Entek
>>finished boards. How can I help my customer with this ? I have heard
>>about "Twister" testpins, increasing contacting force, tightly
>>controlling initial thickness of the coating itself etc.
>>What is your experience, What works in real life ?
>
>I recommend that you print solder paste on the test points so that it will
>reflow and leave a tin-lead surface. You can use a "spearpoint" test pin
>which has a higher normal force to break the organometallic coating, but it
>seems to me that modifying your stencil is a fairly inexpensive and
>effective way to deal with this.
>
>By design, most test points are clear and will take paste & reflow on top,
>or wave solder automatically if that's your process.
>
>I consider my life to be real. Maybe not - i.e., you are all just actors in
>the ongoing tragi-comedy drama. If this is fiction, thanks for all the
>effort out there, and your question is moot.
>
>
>regards,
>
>
>Jerry Cupples
>Interphase Corporation
>Dallas, TX USA
>http://www.iphase.com/
>
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