I know that if there is to be two high voltage traces on a pwb and they
are on the same layer, there is information in IPC-D-275 that covers
this.  We manufacture products that go through UL and follow their
spacing guidelines.

Up to this point we have done single and double sided designs.  However
do to a huge size constraint I have been given the ok to do a 4 layer
board for a product that needs to switch 220V.

My question(s) is this.  Are there guidelines for burying high voltage
traces on inner layers to meet spacing requirements or are there none.
Lets say that I put one side of the 220V line on the Top side of the 4
layer board, and the other side of the 220V line on layer 3, are there
still spacing requirements I have to meet?  The disgram below shows the
layers.

---------------------  Top layer with 1 side of the 220V line
---------------------  Mid Layer 1
---------------------  Mid Layer 2 with the other side of the 220V line
---------------------  Bottom (Wave Solder Side) Layer

Any help, comments, criticisms would be appreciated.



Mark Ross

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