Ziarek, Paul J wrote:
>
>      I have a 4 layer design which includes significant areas of solid
>      plane on every layer.  Our design guidelines call for clearances
>      between the plane and any other conductor (trace or pad) of 0.015" on
>      outer layers and 0.012" on inner layers.  Clearance trace-trace,
>      trace-pad, and pad-pad is 0.008".  The design Engineer wants 0.008"
>      clearance between planes and oher conductive features.  Can anyone
>      explain the  reason for the difference between clearance to planes and
>      to other features?  We're using 1 oz. copper on the inner layers and
>      0.5oz. (1.5oz finninshd) on the outers.  Thanks in advance for any
>      words of wisdom you can provide.
>
>      Paul Ziarek


Hi Paul,

Have you had a look at how old the plane-other-feature clearance rule
is? It wouldn't surprise me to find that that it is a hangover from a
time (Not ALL that long ago) when these rules were a lot to do with
etching 12 mil traces and 13 mil spaces on 25 mil grids. (You know, when
dinasours roamed the earth).

It's possible that everyone has been paying lip service to a plane
clearance rule, or have boards that were slack enough to take it. These
days, etching thin traces near large planes is not the issue it used to
be.

--

Cheers

.......Andy K.

=======================================================================
Andy Kowalewski                         Phone:  +61 3   9264 3767
PCB Design Engineer                     Fax:    +61 3   9264 3507
NEC Australia                   email   [log in to unmask]
                        Mobile: Australia               0412 281 284
                                International   +61      412 281 284
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