DESIGNERCOUNCIL Archives

January 1998

DesignerCouncil@IPC.ORG

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Subject:
From:
"Richard P. Janda Jr." <[log in to unmask]>
Reply To:
DesignerCouncil Mail Forum.
Date:
Fri, 9 Jan 1998 10:47:12 -0600
Content-Type:
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Ken Barrett wrote:
>
> > From: JoAnn Amerson <[log in to unmask]>
> > Subject: [DC] Spacing, etc questions
> > To: [log in to unmask]
> >
> > Good morning folks!  I have a few questions and would appreciate some feedback
> > from others.  I'd like to find out what others in the field are doing to either
> > support our practices or re-vamp them.
> >
> > (1) Could someone explain why pad to conductor spacing is greater than
> > conductor to conductor?  If I only need to stay 8 mil away for the conductor,
> > why do I need 10 mil or more from a pad on the same net?  Or is this just one
> > of the quirky things we do here?
>
> ----> If the pad is clear of soldermask (exposed) then your standard probably
>       is compensating for that.  Soldermask openings are typically larger than
>       the copper pad, this to allow for the greater tolerance of the soldermask
>       process.  If your soldermask is 4 mils larger than your pad, (providing a
>       2 mil anular ring), then your normal 8 mil clearance could be increased to
>       10 mils.

Also, if you have buried signal layers surrounded by power planes,
you need to keep the conductor away from the relief pads thereby
insuring that the trace is over the copper plane area.
--
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| Richard Paul Felix Janda Jr. |  E-mail  . [log in to unmask]     |
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