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January 1998

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Subject:
IPCchat session announcement
From:
[log in to unmask][log in to unmask], 29 Jan 1998 15:58:59 -08002_- 41_29Jan199815:58:[log in to unmask] 43468 31 21_GEN: Comparison Study15_Jan [log in to unmask], 29 Jan 1998 15:12:33 -0700374_- We are trying to get a block change on our Mil-Std-2000A contracts to
IPC-A-610 Level 2. Our DCMC reps have numerous concerns regarding level
2.

Has anyone done a Mil-Std-2000A to IPC-A-610 Level 2 or Level 3
comparison study th_0_ 46411 41 15_Re: PWB Coupons17_Werner [log in to unmask], 31 Jan 1998 08:19:34 EST551_ISO-8859-1 Hi Dale, From your posting it is not clear whether your client wants to reject the lot because "the coupons on the outer edge of the board were greater than 0.5 inch from the active area of the board as specified by IPC 275" or because there is "a random etchback problem" in the boards. The impression given is that it is the former. If that is the case than this is pretty 'legalistic' and not based on technichal insight. If you look at Figure 7-1 of IPC-D-275 you will see that the coupon location is given as "0.250"/0.500" TYP", [...]38_31Jan199808:19:[log in to unmask] 46453 70 29_Re: IPC SPECS and PWB COUPONS9_Ed [log in to unmask], 31 Jan 1998 10:32:55 -0600619_us-ascii The coupon issue of IPC-D-275 has long been a issue with me as a bare board manufacturer. Many instances I have been in discussions where this standard is quoted in reference as to how a board is manufactured. To this date, I believe the scope of this documents still limits this document to board design and not manufacturing. However, there are sections within this document that directly influences if not outright specify manufacturing requirements. Such as in the case cited in Werner Engelmaier response regarding the placement of coupons on a panel where he cited the requirements of 7.3.1.
The [...]40_31Jan199810:32:[log in to unmask] 46524 88 48_Re: Small holes, Thick Boards & Hole Reliability17_Sharon [log in to unmask], 31 Jan 1998 10:57:41 -0800373_us-ascii Hi Thad,

Z-axis expansion is probably going to be an issue with this board unless
you use a material with Tg>170 deg. You can also do some things with the
plating to provide the best tensile/elongation strength possible. (Panel
plating, lower amperage, etc.) but the Z-axis expansion is the critical
factor here.

Have a good day, [...]53_31Jan199810:57:[log in to unmask] 46613 63 15_Re: PWB Coupons17_Sharon [log in to unmask], 31 Jan 1998 11:02:02 -0800601_us-ascii Hi,

Seems like a drag to toss boards because of this. Even if you had to use a
percentage of the boards for destructive testing, as in providing
validation boards, it would be better than scrapping them.

Have a good day.
Sharon

At 10:17 PM 1/30/98 EST, you wrote:
>IPC Community
> We at the University of Dayton RI have been evaluating PWBs for a local
>company. They want to reject a lot of PWBs because the coupons on the outer
>edge of the board were greater than 0.5 inch from the active area of the
board
>as specified by [...]53_31Jan199811:02:[log in to unmask]
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Date:
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************************************************************************
*    This message was originated by automatic IPC Chat Session
*    Request Page (http://www.ipc.org/IPCchat/IPCchat_request.html)
************************************************************************

Russell Young ([log in to unmask]) announces a Chat session with topic
"Criteria for no-clean process inspection and training".
The Chat session will be held on 01/29/98, at 01:48 P.M. CST
 (Please note the time zone - it might be different from yours)

Russell Young's comments:
Does IPC/anyone has any information/standard for
this topic?  Please reply on this message.


Russ



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