At 01:33 PM 1/30/98 -0600, Russel Pringle wrote:
>Dear Gary,
>
> Help!!!
>
> There is three of us taking the IPC Designer Certification test
and we need help with the study guide.
>
> We have been going through the appenix "A" in the study guide.
There are question without answers in ether the study guide or the
referenced specifications.
>Please advise us today "Friday" where we might find these answers.
>The questions are as follows:
>
Hi Russel,
Here are some of my comments to these questions.
>Q. 1.A.5 second bullet
> describe the amount of land area needed for SMT -vs- Through Hole
>through hole where you only need
A. The land area needed for SMT requires the known height, width and length
of the component for calculating the actual land pattern, vs. just the
finished drill diameter for through hole components as well as the actual
drill diameter including tolerences, prior to plating up the land or pad
for the through hole drill size. So you have to (for SMT), interperate the
x,y and z axis for any SMT part land pattern to be effective for both IR
Reflow or Wave soldering.
>Q. 1.A.6 Forth bullet
> Indentify mantianance requirements on layout
>
A. Mantinance requirements are a little skewed and specific with the layout
tool being used, however to me maintinance req'd. for me is: to be able to
modify a layout even using a gridless routing tool. In this high tech
world we live in changes are eminante from prototype thru production.
>Q. 2.A.1 Forth bullet
> Explain the "papar doll" placement strategy
>
A. Paper doll placement strategy is where you make one to one scaled boxes
of the outer parameters (including pick and place clearences) of each
component or part to determine if the space allocated is sufficient for
parts placement over the entire PCB.
>Q. 2.A.3 Second bullet
> Descride what to do with unused logic pins and why.
>
A. Unused logic pins should be tied to power or ground (hi/low) to
eliminate the possibility of noise or unwanted triggers and registers from
the output of that device. This should be specified from the cognizant
engineer.
>Q. 3.A.1 Third bullet
> Indentify thickness relationships.
>
A. IMHO thickness relationships are related to size of the PCB for warp and
twist concerns and also relates to the minimum via drill size. When you
have a .125 thk. PCB and have a .010 via, it drives the cost up because of
the registration between layer to layer, especially for multilayer boards
with 6 or more signal or trace layers. A simple answer is Rigidity.
>Q. 4.A.1 Second bullet
> indentify DIP and SIP impact on routing.
A. DIP= Dual inline package, SIP= Single inline package. My concern is if
it is a high speed circuits or ECL is that the SIP or terminating resistors
must be as close to the end LOAD. ie: source -> load1 -> load2 -> etc. ->
termination so placement of the sip can become critical.
>
> Third bullet
> Indentify DIP and SIP impact on cost.
>
This is kind of a dumb question because it is determined by the number of
signals that need to be terminated. IMHO I would prefer to use a SIP any
day because of the space required to complete your route. and again is this
question related to SMT or through hole technology? The cost is derived by
the old supply and demand laws. You may save money in space using the SIP
but availibility or lead time may increace your cost if the value of the
resistor is not imediatly availible.
>Q. 4.A.8 forth bullet
> Define minimum space requirements for jumpers.
>
A. Enough room to get your fingers in there to change the positions. This
question kind of puzzles me because it is not specific enough. Are we
talking about lead to lead spacing (.100 min) or are we talking about
clearence around the jumper?
>Q. 4.A.12 First bullet
> Descride the "Source Control" drawing.
>A. A Source Control drawing is nothing more than a data sheet with your
company format that will give you multiple Vendors to aquire the same part vs.
sole or single sourcing. It becomes important when lead times are critical
for a specific part.
> Third and Forth Bullets
>Q. Intrepret a vendor data sheet.
A. Materials, dimensions for height, width, length, markings, value, volts,
watts, device type, amps, temp, etc.... special considerations for the
component being considered for a particular design.
>Q. Define methods of access for specification data sheets.
Get them directly from the data books and in most cases now you can obtain
access to data sheets directly and download a dwg. from the internet.
>
>Q. 5.a.1 1-3 bullets
> define pick andd place requirements
A. Pin 1 or centroid and the format of the pick and place machine
utilized. If your design is using SMT you must have 3 Global fiducial
(typically where in the same orientation as your alignment targets and a
fiducial in opposing corners for each fine pitch component.
Q. Define manufacturing tolerances for pick and place equipment
A. This is again specific to the machine or robot and is different for
through hole vs. SMT components. Talk to your assembly vendor is my best
answer for complete DFM (design for manufacturability). If SMT is used you
should supply your vendor with a paste mask screen or film for both the
primary
and secondary side if applicable.
>Q DEscribe tolerances necessary for manual placement
A. Enough clearence for through hole parts to fit within the drilled
diameter and for surface mount sufficiant soldermask clearences without
creating a bridge between lands of soldermask to avoid gaps or opens when
soldered. The CAD system should be able to provide an Assembly drawing(s)
to be exact in displaying component outline and Ref Des. The bill of
materials must be accurate. The assembly dwg. should show any max height
requirements within a tolerance of +/- .025".
>Q. 5.A.4 second bullet
> Describe the proper and improper use of pin 1 marking on ICs.
>
A. The proper use of pin 1 marking on ICs should be a square pad as well
as any polarized component such as capicitors, diodes, led's, connectors,
etc...
An improper use would be to have it on your silkscreen underneath the part
when fully assembled. Keep in mind that there are guys and girls out there
in the field who have to trouble shoot the board if somthing goes wrong!
JHMO (just my humble opinion) Steve Toothacre
Electro-CADD, Inc.
(619) 748-4223
>Gary please contact us off-line for discussion about study guide.
>
>Russ Pringle
>Barbara Burcham
>Rick Wilson
>Halliburton
>
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